Boltzmann Switching MoS2 Metal-Semiconductor Field-Effect Transistors Enabled by Monolithic-Oxide-Gapped Metal Gates at the Schottky-Mott Limit

© 2024 The Authors. Advanced Materials published by Wiley‐VCH GmbH.

Bibliographische Detailangaben
Veröffentlicht in:Advanced materials (Deerfield Beach, Fla.). - 1998. - 36(2024), 29 vom: 04. Juli, Seite e2314274
1. Verfasser: Kim, Yeon Ho (VerfasserIn)
Weitere Verfasser: Jiang, Wei, Lee, Donghun, Moon, Donghoon, Choi, Hyun-Young, Shin, June-Chul, Jeong, Yeonsu, Kim, Jong Chan, Lee, Jaeho, Huh, Woong, Han, Chang Yong, So, Jae-Pil, Kim, Tae Soo, Kim, Seong Been, Koo, Hyun Cheol, Wang, Gunuk, Kang, Kibum, Park, Hong-Gyu, Jeong, Hu Young, Im, Seongil, Lee, Gwan-Hyoung, Low, Tony, Lee, Chul-Ho
Format: Online-Aufsatz
Sprache:English
Veröffentlicht: 2024
Zugriff auf das übergeordnete Werk:Advanced materials (Deerfield Beach, Fla.)
Schlagworte:Journal Article 2D semiconductors Fermi‐level pinning MoS2 low‐power electronics metal–semiconductor field‐effect transistors
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520 |a A gate stack that facilitates a high-quality interface and tight electrostatic control is crucial for realizing high-performance and low-power field-effect transistors (FETs). However, when constructing conventional metal-oxide-semiconductor structures with two-dimensional (2D) transition metal dichalcogenide channels, achieving these requirements becomes challenging due to inherent difficulties in obtaining high-quality gate dielectrics through native oxidation or film deposition. Here, a gate-dielectric-less device architecture of van der Waals Schottky gated metal-semiconductor FETs (vdW-SG MESFETs) using a molybdenum disulfide (MoS2) channel and surface-oxidized metal gates such as nickel and copper is reported. Benefiting from the strong SG coupling, these MESFETs operate at remarkably low gate voltages, <0.5 V. Notably, they also exhibit Boltzmann-limited switching behavior featured by a subthreshold swing of ≈60 mV dec-1 and negligible hysteresis. These ideal FET characteristics are attributed to the formation of a Fermi-level (EF) pinning-free gate stack at the Schottky-Mott limit. Furthermore, authors experimentally and theoretically confirm that EF depinning can be achieved by suppressing both metal-induced and disorder-induced gap states at the interface between the monolithic-oxide-gapped metal gate and the MoS2 channel. This work paves a new route for designing high-performance and energy-efficient 2D electronics 
650 4 |a Journal Article 
650 4 |a 2D semiconductors 
650 4 |a Fermi‐level pinning 
650 4 |a MoS2 
650 4 |a low‐power electronics 
650 4 |a metal–semiconductor field‐effect transistors 
700 1 |a Jiang, Wei  |e verfasserin  |4 aut 
700 1 |a Lee, Donghun  |e verfasserin  |4 aut 
700 1 |a Moon, Donghoon  |e verfasserin  |4 aut 
700 1 |a Choi, Hyun-Young  |e verfasserin  |4 aut 
700 1 |a Shin, June-Chul  |e verfasserin  |4 aut 
700 1 |a Jeong, Yeonsu  |e verfasserin  |4 aut 
700 1 |a Kim, Jong Chan  |e verfasserin  |4 aut 
700 1 |a Lee, Jaeho  |e verfasserin  |4 aut 
700 1 |a Huh, Woong  |e verfasserin  |4 aut 
700 1 |a Han, Chang Yong  |e verfasserin  |4 aut 
700 1 |a So, Jae-Pil  |e verfasserin  |4 aut 
700 1 |a Kim, Tae Soo  |e verfasserin  |4 aut 
700 1 |a Kim, Seong Been  |e verfasserin  |4 aut 
700 1 |a Koo, Hyun Cheol  |e verfasserin  |4 aut 
700 1 |a Wang, Gunuk  |e verfasserin  |4 aut 
700 1 |a Kang, Kibum  |e verfasserin  |4 aut 
700 1 |a Park, Hong-Gyu  |e verfasserin  |4 aut 
700 1 |a Jeong, Hu Young  |e verfasserin  |4 aut 
700 1 |a Im, Seongil  |e verfasserin  |4 aut 
700 1 |a Lee, Gwan-Hyoung  |e verfasserin  |4 aut 
700 1 |a Low, Tony  |e verfasserin  |4 aut 
700 1 |a Lee, Chul-Ho  |e verfasserin  |4 aut 
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