High Mobilities in Layered InSe Transistors with Indium-Encapsulation-Induced Surface Charge Doping

© 2018 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim.

Bibliographische Detailangaben
Veröffentlicht in:Advanced materials (Deerfield Beach, Fla.). - 1998. - 30(2018), 44 vom: 27. Nov., Seite e1803690
1. Verfasser: Li, Mengjiao (VerfasserIn)
Weitere Verfasser: Lin, Che-Yi, Yang, Shih-Hsien, Chang, Yuan-Ming, Chang, Jen-Kuei, Yang, Feng-Shou, Zhong, Chaorong, Jian, Wen-Bin, Lien, Chen-Hsin, Ho, Ching-Hwa, Liu, Heng-Jui, Huang, Rong, Li, Wenwu, Lin, Yen-Fu, Chu, Junhao
Format: Online-Aufsatz
Sprache:English
Veröffentlicht: 2018
Zugriff auf das übergeordnete Werk:Advanced materials (Deerfield Beach, Fla.)
Schlagworte:Journal Article 2D electronics InSe transistors logic circuits low‐frequency noise surface charge transfer doping
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520 |a Tunability and stability in the electrical properties of 2D semiconductors pave the way for their practical applications in logic devices. A robust layered indium selenide (InSe) field-effect transistor (FET) with superior controlled stability is demonstrated by depositing an indium (In) doping layer. The optimized InSe FETs deliver an unprecedented high electron mobility up to 3700 cm2 V-1 s-1 at room temperature, which can be retained with 60% after 1 month. Further insight into the evolution of the position of the Fermi level and the microscopic device structure with different In thicknesses demonstrates an enhanced electron-doping behavior at the In/InSe interface. Furthermore, the contact resistance is also improved through the In insertion between InSe and Au electrodes, which coincides with the analysis of the low-frequency noise. The carrier fluctuation is attributed to the dominance of the phonon scattering events, which agrees with the observation of the temperature-dependent mobility. Finally, the flexible functionalities of the logic-circuit applications, for instance, inverter and not-and (NAND)/not-or (NOR) gates, are determined with these surface-doping InSe FETs, which establish a paradigm for 2D-based materials to overcome the bottleneck in the development of electronic devices 
650 4 |a Journal Article 
650 4 |a 2D electronics 
650 4 |a InSe transistors 
650 4 |a logic circuits 
650 4 |a low‐frequency noise 
650 4 |a surface charge transfer doping 
700 1 |a Lin, Che-Yi  |e verfasserin  |4 aut 
700 1 |a Yang, Shih-Hsien  |e verfasserin  |4 aut 
700 1 |a Chang, Yuan-Ming  |e verfasserin  |4 aut 
700 1 |a Chang, Jen-Kuei  |e verfasserin  |4 aut 
700 1 |a Yang, Feng-Shou  |e verfasserin  |4 aut 
700 1 |a Zhong, Chaorong  |e verfasserin  |4 aut 
700 1 |a Jian, Wen-Bin  |e verfasserin  |4 aut 
700 1 |a Lien, Chen-Hsin  |e verfasserin  |4 aut 
700 1 |a Ho, Ching-Hwa  |e verfasserin  |4 aut 
700 1 |a Liu, Heng-Jui  |e verfasserin  |4 aut 
700 1 |a Huang, Rong  |e verfasserin  |4 aut 
700 1 |a Li, Wenwu  |e verfasserin  |4 aut 
700 1 |a Lin, Yen-Fu  |e verfasserin  |4 aut 
700 1 |a Chu, Junhao  |e verfasserin  |4 aut 
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