SnSe/MoS2 van der Waals Heterostructure Junction Field-Effect Transistors with Nearly Ideal Subthreshold Slope
© 2019 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Veröffentlicht in: | Advanced materials (Deerfield Beach, Fla.). - 1998. - 31(2019), 49 vom: 13. Dez., Seite e1902962 |
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Weitere Verfasser: | , , , , |
Format: | Online-Aufsatz |
Sprache: | English |
Veröffentlicht: |
2019
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Zugriff auf das übergeordnete Werk: | Advanced materials (Deerfield Beach, Fla.) |
Schlagworte: | Journal Article 2D semiconductors junction field-effect transistor subthreshold swing van der Waals heterostructures |
Zusammenfassung: | © 2019 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim. The minimization of the subthreshold swing (SS) in transistors is essential for low-voltage operation and lower power consumption, both critical for mobile devices and internet of things (IoT) devices. The conventional metal-oxide-semiconductor field-effect transistor requires sophisticated dielectric engineering to achieve nearly ideal SS (60 mV dec-1 at room temperature). However, another type of transistor, the junction field-effect transistor (JFET) is free of dielectric layer and can reach the theoretical SS limit without complicated dielectric engineering. The construction of a 2D SnSe/MoS2 van der Waals (vdW) heterostructure-based JFET with nearly ideal SS is reported. It is shown that the SnSe/MoS2 vdW heterostructure exhibits excellent p-n diode rectifying characteristics with low saturate current. Using the SnSe as the gate and MoS2 as the channel, the SnSe/MoS2 vdW heterostructure exhibit well-behavioured n-channel JFET characteristics with a small pinch-off voltage VP of -0.25 V, nearly ideal subthreshold swing SS of 60.3 mV dec-1 and high ON/OFF ratio over 106 , demonstrating excellent electronic performance especially in the subthreshold regime |
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Beschreibung: | Date Completed 09.12.2019 Date Revised 30.09.2020 published: Print-Electronic Citation Status PubMed-not-MEDLINE |
ISSN: | 1521-4095 |
DOI: | 10.1002/adma.201902962 |