Monolithic 3D CMOS Using Layered Semiconductors

Monolithic 3D CMOS Using Layered Semiconductors

© 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Bibliographische Detailangaben
Veröffentlicht in:Advanced materials (Deerfield Beach, Fla.). - 1998. - 28(2016), 13 vom: 06. Apr., Seite 2547-54
1. Verfasser: Sachid, Angada B (VerfasserIn)
Weitere Verfasser: Tosun, Mahmut, Desai, Sujay B, Hsu, Ching-Yi, Lien, Der-Hsien, Madhvapathy, Surabhi R, Chen, Yu-Ze, Hettick, Mark, Kang, Jeong Seuk, Zeng, Yuping, He, Jr-Hau, Chang, Edward Yi, Chueh, Yu-Lun, Javey, Ali, Hu, Chenming
Format: Online-Aufsatz
Sprache:English
Veröffentlicht: 2016
Zugriff auf das übergeordnete Werk:Advanced materials (Deerfield Beach, Fla.)
Schlagworte:Journal Article metal oxide semiconductors monolithic 3D integration transition metal dichalcogenides ultra-low voltage operation
Beschreibung
Zusammenfassung:© 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low-temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high-density, ultralow-voltage, and ultralow-power applications
Beschreibung:Date Completed 08.08.2016
Date Revised 30.09.2020
published: Print-Electronic
Citation Status PubMed-not-MEDLINE
ISSN:1521-4095
DOI:10.1002/adma.201505113