Interface engineering for high-performance top-gated MoS2 field-effect transistors

© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Bibliographische Detailangaben
Veröffentlicht in:Advanced materials (Deerfield Beach, Fla.). - 1998. - 26(2014), 36 vom: 29. Sept., Seite 6255-61
1. Verfasser: Zou, Xuming (VerfasserIn)
Weitere Verfasser: Wang, Jingli, Chiu, Chung-Hua, Wu, Yun, Xiao, Xiangheng, Jiang, Changzhong, Wu, Wen-Wei, Mai, Liqiang, Chen, Tangsheng, Li, Jinchai, Ho, Johnny C, Liao, Lei
Format: Online-Aufsatz
Sprache:English
Veröffentlicht: 2014
Zugriff auf das übergeordnete Werk:Advanced materials (Deerfield Beach, Fla.)
Schlagworte:Journal Article Research Support, Non-U.S. Gov't MoS2 interface engineering top-gated transistors two-dimensional materials
LEADER 01000naa a22002652 4500
001 NLM240495446
003 DE-627
005 20231224122227.0
007 cr uuu---uuuuu
008 231224s2014 xx |||||o 00| ||eng c
024 7 |a 10.1002/adma.201402008  |2 doi 
028 5 2 |a pubmed24n0801.xml 
035 |a (DE-627)NLM240495446 
035 |a (NLM)25070646 
040 |a DE-627  |b ger  |c DE-627  |e rakwb 
041 |a eng 
100 1 |a Zou, Xuming  |e verfasserin  |4 aut 
245 1 0 |a Interface engineering for high-performance top-gated MoS2 field-effect transistors 
264 1 |c 2014 
336 |a Text  |b txt  |2 rdacontent 
337 |a ƒaComputermedien  |b c  |2 rdamedia 
338 |a ƒa Online-Ressource  |b cr  |2 rdacarrier 
500 |a Date Completed 21.05.2015 
500 |a Date Revised 30.09.2020 
500 |a published: Print-Electronic 
500 |a Citation Status PubMed-not-MEDLINE 
520 |a © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim. 
520 |a Experimental evidence of the optimized interface engineering effects in MoS2 transistors is demonstrated. The MoS2/Y2O3/HfO2 stack offers excellent interface control. Results show that HfO2 layer can be scaled down to 9 nm, yet achieving a near-ideal sub-threshold slope (65 mv/dec) and the highest saturation current (526 μA/μm) of any MoS2 transistor reported to date 
650 4 |a Journal Article 
650 4 |a Research Support, Non-U.S. Gov't 
650 4 |a MoS2 
650 4 |a interface engineering 
650 4 |a top-gated 
650 4 |a transistors 
650 4 |a two-dimensional materials 
700 1 |a Wang, Jingli  |e verfasserin  |4 aut 
700 1 |a Chiu, Chung-Hua  |e verfasserin  |4 aut 
700 1 |a Wu, Yun  |e verfasserin  |4 aut 
700 1 |a Xiao, Xiangheng  |e verfasserin  |4 aut 
700 1 |a Jiang, Changzhong  |e verfasserin  |4 aut 
700 1 |a Wu, Wen-Wei  |e verfasserin  |4 aut 
700 1 |a Mai, Liqiang  |e verfasserin  |4 aut 
700 1 |a Chen, Tangsheng  |e verfasserin  |4 aut 
700 1 |a Li, Jinchai  |e verfasserin  |4 aut 
700 1 |a Ho, Johnny C  |e verfasserin  |4 aut 
700 1 |a Liao, Lei  |e verfasserin  |4 aut 
773 0 8 |i Enthalten in  |t Advanced materials (Deerfield Beach, Fla.)  |d 1998  |g 26(2014), 36 vom: 29. Sept., Seite 6255-61  |w (DE-627)NLM098206397  |x 1521-4095  |7 nnns 
773 1 8 |g volume:26  |g year:2014  |g number:36  |g day:29  |g month:09  |g pages:6255-61 
856 4 0 |u http://dx.doi.org/10.1002/adma.201402008  |3 Volltext 
912 |a GBV_USEFLAG_A 
912 |a SYSFLAG_A 
912 |a GBV_NLM 
912 |a GBV_ILN_350 
951 |a AR 
952 |d 26  |j 2014  |e 36  |b 29  |c 09  |h 6255-61