3D-transistor array based on horizontally suspended silicon nano-bridges grown via a bottom-up technique

3D-transistor array based on horizontally suspended silicon nano-bridges grown via a bottom-up technique

© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Bibliographische Detailangaben
Veröffentlicht in:Advanced materials (Deerfield Beach, Fla.). - 1998. - 26(2014), 12 vom: 26. März, Seite 1929-34
1. Verfasser: Oh, Jin Yong (VerfasserIn)
Weitere Verfasser: Park, Jong-Tae, Jang, Hyun-June, Cho, Won-Ju, Islam, M Saif
Format: Online-Aufsatz
Sprache:English
Veröffentlicht: 2014
Zugriff auf das übergeordnete Werk:Advanced materials (Deerfield Beach, Fla.)
Schlagworte:Journal Article Research Support, Non-U.S. Gov't VLS bottom-up bridge field effect transistor memory nanowire silicon surround gate
LEADER 01000naa a22002652 4500
001 NLM235015385
003 DE-627
005 20231224102513.0
007 cr uuu---uuuuu
008 231224s2014 xx |||||o 00| ||eng c
024 7 |a 10.1002/adma.201304245  |2 doi 
028 5 2 |a pubmed24n0783.xml 
035 |a (DE-627)NLM235015385 
035 |a (NLM)24481869 
040 |a DE-627  |b ger  |c DE-627  |e rakwb 
041 |a eng 
100 1 |a Oh, Jin Yong  |e verfasserin  |4 aut 
245 1 0 |a 3D-transistor array based on horizontally suspended silicon nano-bridges grown via a bottom-up technique 
264 1 |c 2014 
336 |a Text  |b txt  |2 rdacontent 
337 |a ƒaComputermedien  |b c  |2 rdamedia 
338 |a ƒa Online-Ressource  |b cr  |2 rdacarrier 
500 |a Date Completed 25.11.2014 
500 |a Date Revised 30.09.2020 
500 |a published: Print-Electronic 
500 |a Citation Status PubMed-not-MEDLINE 
520 |a © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim. 
520 |a Integrated surround-gate field-effect-transistors enabled by bottom-up synthesis of nano-bridges are demonstrated. Horizontally oriented silicon nano-bridge devices are fabricated avoiding the rigorous processes for aligning and contacting nanowires grown via a bottom-up technique. Evaluation of electrical properties and a memory device application of the transistors are presented 
650 4 |a Journal Article 
650 4 |a Research Support, Non-U.S. Gov't 
650 4 |a VLS 
650 4 |a bottom-up 
650 4 |a bridge 
650 4 |a field effect transistor 
650 4 |a memory 
650 4 |a nanowire 
650 4 |a silicon 
650 4 |a surround gate 
700 1 |a Park, Jong-Tae  |e verfasserin  |4 aut 
700 1 |a Jang, Hyun-June  |e verfasserin  |4 aut 
700 1 |a Cho, Won-Ju  |e verfasserin  |4 aut 
700 1 |a Islam, M Saif  |e verfasserin  |4 aut 
773 0 8 |i Enthalten in  |t Advanced materials (Deerfield Beach, Fla.)  |d 1998  |g 26(2014), 12 vom: 26. März, Seite 1929-34  |w (DE-627)NLM098206397  |x 1521-4095  |7 nnns 
773 1 8 |g volume:26  |g year:2014  |g number:12  |g day:26  |g month:03  |g pages:1929-34 
856 4 0 |u http://dx.doi.org/10.1002/adma.201304245  |3 Volltext 
912 |a GBV_USEFLAG_A 
912 |a SYSFLAG_A 
912 |a GBV_NLM 
912 |a GBV_ILN_350 
951 |a AR 
952 |d 26  |j 2014  |e 12  |b 26  |c 03  |h 1929-34