A Fermi-Level-Pinning-Free 1D Electrical Contact at the Intrinsic 2D MoS2 -Metal Junction

© 2019 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Bibliographische Detailangaben
Veröffentlicht in:Advanced materials (Deerfield Beach, Fla.). - 1998. - 31(2019), 25 vom: 11. Juni, Seite e1808231
1. Verfasser: Yang, Zheng (VerfasserIn)
Weitere Verfasser: Kim, Changsik, Lee, Kwang Young, Lee, Myeongjin, Appalakondaiah, Samudrala, Ra, Chang-Ho, Watanabe, Kenji, Taniguchi, Takashi, Cho, Kyeongjae, Hwang, Euyheon, Hone, James, Yoo, Won Jong
Format: Online-Aufsatz
Sprache:English
Veröffentlicht: 2019
Zugriff auf das übergeordnete Werk:Advanced materials (Deerfield Beach, Fla.)
Schlagworte:Journal Article Fermi level depinning high mobility intrinsic MoS2 p-type transistor
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520 |a Currently 2D crystals are being studied intensively for use in future nanoelectronics, as conventional semiconductor devices face challenges in high power consumption and short channel effects when scaled to the quantum limit. Toward this end, achieving barrier-free contact to 2D semiconductors has emerged as a major roadblock. In conventional contacts to bulk metals, the 2D semiconductor Fermi levels become pinned inside the bandgap, deviating from the ideal Schottky-Mott rule and resulting in significant suppression of carrier transport in the device. Here, MoS2 polarity control is realized without extrinsic doping by employing a 1D elemental metal contact scheme. The use of high-work-function palladium (Pd) or gold (Au) enables a high-quality p-type dominant contact to intrinsic MoS2 , realizing Fermi level depinning. Field-effect transistors (FETs) with Pd edge contact and Au edge contact show high performance with the highest hole mobility reaching 330 and 432 cm2 V-1 s-1 at 300 K, respectively. The ideal Fermi level alignment allows creation of p- and n-type FETs on the same intrinsic MoS2 flake using Pd and low-work-function molybdenum (Mo) contacts, respectively. This device acts as an efficient inverter, a basic building block for semiconductor integrated circuits, with gain reaching 15 at VD = 5 V 
650 4 |a Journal Article 
650 4 |a Fermi level depinning 
650 4 |a high mobility 
650 4 |a intrinsic MoS2 
650 4 |a p-type 
650 4 |a transistor 
700 1 |a Kim, Changsik  |e verfasserin  |4 aut 
700 1 |a Lee, Kwang Young  |e verfasserin  |4 aut 
700 1 |a Lee, Myeongjin  |e verfasserin  |4 aut 
700 1 |a Appalakondaiah, Samudrala  |e verfasserin  |4 aut 
700 1 |a Ra, Chang-Ho  |e verfasserin  |4 aut 
700 1 |a Watanabe, Kenji  |e verfasserin  |4 aut 
700 1 |a Taniguchi, Takashi  |e verfasserin  |4 aut 
700 1 |a Cho, Kyeongjae  |e verfasserin  |4 aut 
700 1 |a Hwang, Euyheon  |e verfasserin  |4 aut 
700 1 |a Hone, James  |e verfasserin  |4 aut 
700 1 |a Yoo, Won Jong  |e verfasserin  |4 aut 
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773 1 8 |g volume:31  |g year:2019  |g number:25  |g day:11  |g month:06  |g pages:e1808231 
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