Thread-Like CMOS Logic Circuits Enabled by Reel-Processed Single-Walled Carbon Nanotube Transistors via Selective Doping
© 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
| Veröffentlicht in: | Advanced materials (Deerfield Beach, Fla.). - 1998. - 29(2017), 31 vom: 01. Aug. |
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| 1. Verfasser: | |
| Weitere Verfasser: | , , , , , , , , |
| Format: | Online-Aufsatz |
| Sprache: | English |
| Veröffentlicht: |
2017
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| Zugriff auf das übergeordnete Werk: | Advanced materials (Deerfield Beach, Fla.) |
| Schlagworte: | Journal Article complelentary metal-oxide-semiconductor (CMOS) integrated circuits deep UV irradiation single-walled carbon nanotubes (SWCNTs) thread-like fiber electronic devices transistors |
| Zusammenfassung: | © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim. The realization of large-area electronics with full integration of 1D thread-like devices may open up a new era for ultraflexible and human adaptable electronic systems because of their potential advantages in demonstrating scalable complex circuitry by a simply integrated weaving technology. More importantly, the thread-like fiber electronic devices can be achieved using a simple reel-to-reel process, which is strongly required for low-cost and scalable manufacturing technology. Here, high-performance reel-processed complementary metal-oxide-semiconductor (CMOS) integrated circuits are reported on 1D fiber substrates by using selectively chemical-doped single-walled carbon nanotube (SWCNT) transistors. With the introduction of selective n-type doping and a nonrelief photochemical patterning process, p- and n-type SWCNT transistors are successfully implemented on cylindrical fiber substrates under air ambient, enabling high-performance and reliable thread-like CMOS inverter circuits. In addition, it is noteworthy that the optimized reel-coating process can facilitate improvement in the arrangement of SWCNTs, building uniformly well-aligned SWCNT channels, and enhancement of the electrical performance of the devices. The p- and n-type SWCNT transistors exhibit field-effect mobility of 4.03 and 2.15 cm2 V-1 s-1 , respectively, with relatively narrow distribution. Moreover, the SWCNT CMOS inverter circuits demonstrate a gain of 6.76 and relatively good dynamic operation at a supply voltage of 5.0 V |
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| Beschreibung: | Date Completed 18.07.2018 Date Revised 01.10.2020 published: Print-Electronic Citation Status PubMed-not-MEDLINE |
| ISSN: | 1521-4095 |
| DOI: | 10.1002/adma.201701822 |