High-Performance Polymer Monolayer Transistors with Sub-20 nm Channel Lengths

© 2025 Wiley‐VCH GmbH.

Bibliographische Detailangaben
Veröffentlicht in:Advanced materials (Deerfield Beach, Fla.). - 1998. - 37(2025), 28 vom: 05. Juli, Seite e2420201
1. Verfasser: Li, Mengmeng (VerfasserIn)
Weitere Verfasser: Niu, Jiebin, Li, Xufan, Tian, Yue, Ding, Chenming, Lu, Congyan, Yang, Zhenzhong, Huang, Rong, Wang, Lingfei, Yan, He, Li, Ling, Liu, Ming
Format: Online-Aufsatz
Sprache:English
Veröffentlicht: 2025
Zugriff auf das übergeordnete Werk:Advanced materials (Deerfield Beach, Fla.)
Schlagworte:Journal Article conjugated polymer downscaling intrinsic delay monolayer transistor short channel
Beschreibung
Zusammenfassung:© 2025 Wiley‐VCH GmbH.
The scaling strategy is widely used to achieve much improved performance and reduced cost in a single chip with more devices for field-effect transistors (FETs) based on Si and state-of-the-art 2D materials. However, the downscaling of polymer FETs with high performance has not been achieved. Here both the body thickness scaling and channel length scaling strategies are employed, and demonstrate a 2.4-nm-thick polymer monolayer FET, where the shortest channel length (L) of 18 nm is achieved that is comparable to the smallest technology node (≈20 nm) for planar Si FETs. Such short-channel FETs, with good operational stability and reliability, exhibit only slightly lower field-effect mobility than the device with micrometer-long channel, but the on-state current density reaches 2.4 × 10-4 A µm-1. More importantly, a high intrinsic gate delay of 0.79 ps is achieved, while maintaining the on/off current ratio up to 109. Additionally, by increasing the thickness of gate dielectric a remarkable short channel effect is observed, which is in excellent agreement with natural scale length evaluated by the Scale Length Theory
Beschreibung:Date Revised 18.07.2025
published: Print-Electronic
Citation Status PubMed-not-MEDLINE
ISSN:1521-4095
DOI:10.1002/adma.202420201