Corrugated Heterojunction Metal-Oxide Thin-Film Transistors with High Electron Mobility via Vertical Interface Manipulation

© 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Bibliographische Detailangaben
Veröffentlicht in:Advanced materials (Deerfield Beach, Fla.). - 1998. - (2018) vom: 27. Aug., Seite e1804120
1. Verfasser: Lee, Minuk (VerfasserIn)
Weitere Verfasser: Jo, Jeong-Wan, Kim, Yoon-Jeong, Choi, Seungbeom, Kwon, Sung Min, Jeon, Seong Pil, Facchetti, Antonio, Kim, Yong-Hoon, Park, Sung Kyu
Format: Online-Aufsatz
Sprache:English
Veröffentlicht: 2018
Zugriff auf das übergeordnete Werk:Advanced materials (Deerfield Beach, Fla.)
Schlagworte:Journal Article TCAD simulations corrugated structures heterointerfaces metal-oxide thin-film transistors solution processes
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520 |a A new strategy is reported to achieve high-mobility, low-off-current, and operationally stable solution-processable metal-oxide thin-film transistors (TFTs) using a corrugated heterojunction channel structure. The corrugated heterojunction channel, having alternating thin-indium-tin-zinc-oxide (ITZO)/indium-gallium-zinc-oxide (IGZO) and thick-ITZO/IGZO film regions, enables the accumulated electron concentration to be tuned in the TFT off- and on-states via charge modulation at the vertical regions of the heterojunction. The ITZO/IGZO TFTs with optimized corrugated structure exhibit a maximum field-effect mobility >50 cm2 V-1 s-1 with an on/off current ratio of >108 and good operational stability (threshold voltage shift <1 V for a positive-gate-bias stress of 10 ks, without passivation). To exploit the underlying conduction mechanism of the corrugated heterojunction TFTs, a physical model is implemented by using a variety of chemical, structural, and electrical characterization tools and Technology Computer-Aided Design simulations. The physical model reveals that efficient charge manipulation is possible via the corrugated structure, by inducing an extremely high carrier concentration at the nanoscale vertical channel regions, enabling low off-currents and high on-currents depending on the applied gate bias 
650 4 |a Journal Article 
650 4 |a TCAD simulations 
650 4 |a corrugated structures 
650 4 |a heterointerfaces 
650 4 |a metal-oxide thin-film transistors 
650 4 |a solution processes 
700 1 |a Jo, Jeong-Wan  |e verfasserin  |4 aut 
700 1 |a Kim, Yoon-Jeong  |e verfasserin  |4 aut 
700 1 |a Choi, Seungbeom  |e verfasserin  |4 aut 
700 1 |a Kwon, Sung Min  |e verfasserin  |4 aut 
700 1 |a Jeon, Seong Pil  |e verfasserin  |4 aut 
700 1 |a Facchetti, Antonio  |e verfasserin  |4 aut 
700 1 |a Kim, Yong-Hoon  |e verfasserin  |4 aut 
700 1 |a Park, Sung Kyu  |e verfasserin  |4 aut 
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773 1 8 |g year:2018  |g day:27  |g month:08  |g pages:e1804120 
856 4 0 |u http://dx.doi.org/10.1002/adma.201804120  |3 Volltext 
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