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231224s2013 xx |||||o 00| ||eng c |
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|a 10.1109/TIP.2013.2259841
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|a eng
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|a Chiu, Liang-Chi
|e verfasserin
|4 aut
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|a Fast SIFT design for real-time visual feature extraction
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|c 2013
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|a Text
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|a ƒaComputermedien
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|a ƒa Online-Ressource
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|a Date Completed 08.01.2014
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|a Date Revised 07.06.2013
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|a published: Print
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|a Citation Status MEDLINE
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|a Visual feature extraction with scale invariant feature transform (SIFT) is widely used for object recognition. However, its real-time implementation suffers from long latency, heavy computation, and high memory storage because of its frame level computation with iterated Gaussian blur operations. Thus, this paper proposes a layer parallel SIFT (LPSIFT) with integral image, and its parallel hardware design with an on-the-fly feature extraction flow for real-time application needs. Compared with the original SIFT algorithm, the proposed approach reduces the computational amount by 90% and memory usage by 95%. The final implementation uses 580-K gate count with 90-nm CMOS technology, and offers 6000 feature points/frame for VGA images at 30 frames/s and ∼ 2000 feature points/frame for 1920 × 1080 images at 30 frames/s at the clock rate of 100 MHz
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|a Journal Article
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|a Chang, Tian-Sheuan
|e verfasserin
|4 aut
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|a Chen, Jiun-Yen
|e verfasserin
|4 aut
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|a Chang, Nelson Yen-Chung
|e verfasserin
|4 aut
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|i Enthalten in
|t IEEE transactions on image processing : a publication of the IEEE Signal Processing Society
|d 1992
|g 22(2013), 8 vom: 21. Aug., Seite 3158-67
|w (DE-627)NLM09821456X
|x 1941-0042
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|g volume:22
|g year:2013
|g number:8
|g day:21
|g month:08
|g pages:3158-67
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|u http://dx.doi.org/10.1109/TIP.2013.2259841
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