Fast SIFT design for real-time visual feature extraction

Visual feature extraction with scale invariant feature transform (SIFT) is widely used for object recognition. However, its real-time implementation suffers from long latency, heavy computation, and high memory storage because of its frame level computation with iterated Gaussian blur operations. Th...

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Veröffentlicht in:IEEE transactions on image processing : a publication of the IEEE Signal Processing Society. - 1992. - 22(2013), 8 vom: 21. Aug., Seite 3158-67
1. Verfasser: Chiu, Liang-Chi (VerfasserIn)
Weitere Verfasser: Chang, Tian-Sheuan, Chen, Jiun-Yen, Chang, Nelson Yen-Chung
Format: Online-Aufsatz
Sprache:English
Veröffentlicht: 2013
Zugriff auf das übergeordnete Werk:IEEE transactions on image processing : a publication of the IEEE Signal Processing Society
Schlagworte:Journal Article
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520 |a Visual feature extraction with scale invariant feature transform (SIFT) is widely used for object recognition. However, its real-time implementation suffers from long latency, heavy computation, and high memory storage because of its frame level computation with iterated Gaussian blur operations. Thus, this paper proposes a layer parallel SIFT (LPSIFT) with integral image, and its parallel hardware design with an on-the-fly feature extraction flow for real-time application needs. Compared with the original SIFT algorithm, the proposed approach reduces the computational amount by 90% and memory usage by 95%. The final implementation uses 580-K gate count with 90-nm CMOS technology, and offers 6000 feature points/frame for VGA images at 30 frames/s and ∼ 2000 feature points/frame for 1920 × 1080 images at 30 frames/s at the clock rate of 100 MHz 
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700 1 |a Chang, Tian-Sheuan  |e verfasserin  |4 aut 
700 1 |a Chen, Jiun-Yen  |e verfasserin  |4 aut 
700 1 |a Chang, Nelson Yen-Chung  |e verfasserin  |4 aut 
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