A 124 Mpixels/s VLSI design for histogram-based joint bilateral filtering
This paper presents an efficient and scalable design for histogram-based bilateral filtering (BF) and joint BF (JBF) by memory reduction methods and architecture design techniques to solve the problems of high memory cost, high computational complexity, high bandwidth, and large range table. The pre...
Veröffentlicht in: | IEEE transactions on image processing : a publication of the IEEE Signal Processing Society. - 1992. - 20(2011), 11 vom: 24. Nov., Seite 3231-41 |
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Format: | Online-Aufsatz |
Sprache: | English |
Veröffentlicht: |
2011
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Zugriff auf das übergeordnete Werk: | IEEE transactions on image processing : a publication of the IEEE Signal Processing Society |
Schlagworte: | Journal Article Research Support, Non-U.S. Gov't |
Online verfügbar |
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